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Quick reference

Makefile Cheatsheet

A comprehensive reference guide for GNU Make: variable assignment types, automatic magic variables, command prefixes, pattern rules, and conditionals.

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GNU Make is a build automation tool that automatically builds executable programs and libraries from source code by reading files called Makefiles.

Variable Assignments

foo  = "bar"       # Lazy (dynamically expanded when used)
bar  = $(foo) foo  # Dynamically references $(foo)
foo := "boo"       # Immediate (simply expanded once at declaration)
foo ?= /usr/local  # Conditional (assign only if foo is not already set)
bar += world       # Append to existing value
foo != echo hello  # Shell execution (GNU Make 4.0+)

Automatic Magic Variables

Inside recipe execution, Make exposes automatic variables for target and prerequisite references:

out.o: src.c src.h
	$@   # "out.o" (the target name)
	$<   # "src.c" (first prerequisite)
	$^   # "src.c src.h" (all prerequisites with duplicates omitted)
	$+   # "src.c src.h" (all prerequisites preserving duplicates)
	$?   # Prerequisites newer than the target
	$|   # Order-only prerequisites

%.o: %.c
	$*   # The matched pattern stem ("foo" in "foo.c")
	$(@D) # Directory part of the target ("build" in "build/out.o")
	$(@F) # File part of the target ("out.o" in "build/out.o")

Recipe Command Prefixes

Prefix Behavior
@ Do not echo the command to stdout before executing
- Ignore non-zero exit codes (continue build on error)
+ Execute command even if Make runs with -n (dry-run)
build:
	@echo "Compiling binary..."
	-rm -rf temp/
	gcc -o main main.c

Functions & File Matching

Wildcards & Shell

js_files  := $(wildcard src/*.js)
all_files := $(shell find images/ -type f)

String Substitution & Filtering

# Extension substitution
objects = $(sources:.cpp=.o)

# Pattern substitution
outputs = $(patsubst src/%.c, build/%.o, $(wildcard src/*.c))

# Filter and filter-out
c_files = $(filter %.c, $(files))
non_c   = $(filter-out %.c, $(files))

# Whitespace stripping
clean_var = $(strip $(dirty_var))

Conditionals

ifeq ($(CC),gcc)
  CFLAGS += -Wall -O2
else ifeq ($(CC),clang)
  CFLAGS += -Weverything
else
  CFLAGS += -O0
endif

Command-Line Flags

make -j 8           # Run parallel jobs (8 concurrent threads)
make -B, --always-make # Unconditionally build all targets
make -n, --dry-run  # Print commands without executing
make -s, --silent   # Do not print recipe commands
make -e             # Environment variables override Makefile variables

References

Related topics